
ICS874001AGI-02 REVISION A AUGUST 30, 2010
12
2010 Integrated Device Technology, Inc.
ICS74001I-02 Data Sheet
PCI EXPRESS JITTER ATTENUATOR
Recommendations for Unused Input Pins
Inputs:
LVCMOS Control Pins
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional protection.
A 1k
resistor can be used.
LVDS Driver Termination
A general LVDS interface is shown in Figure 4. Standard termination
for LVDS type output structure requires both a 100
parallel resistor
at the receiver and a 100
differential transmission line environment.
In order to avoid any transmission line reflection issues, the 100
resistor must be placed as close to the receiver as possible. IDT
offers a full line of LVDS compliant devices with two types of output
structures: current source and voltage source. The standard
termination schematic as shown in Figure 4 can be used with either
type of output structure. If using a non-standard termination, it is
recommended to contact IDT and confirm if the output is a current
source or a voltage source type structure. In addition, since these
outputs are LVDS compatible, the amplitude and common mode
input range of the input receivers should be verified for compatibility
with the output.
Figure 4. Typical LVDS Driver Termination
100
–
+
100
Differential Transmission Line
LVDS Driver
LVDS
Receiver